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  AP3440 document number: ds 36691 rev. 2 - 2 1 of 15 www.diodes.com march 2014 ? diodes incorporated AP3440 a product line of diodes incorporated new product 4a, 2mhz high performance synchronous buck converter description the AP3440 is a current mode, pwm synchronous buck (step - down) dc - dc converter, capable of driving a 4 a load with high efficiency, excellent line and load regulation. the device integrates two n - channel power mosfets with low on - resistance. current mode control provides fast transient response and cycle - by - cycle current limit. the switching frequency of AP3440 can be programmable fr om 200khz to 2mhz, which allows small - sized components, such as capacitors and inductors. a standard series of inductors from several different manufacturers are available. this feature greatly simplifies the design of switch - mode power supplies. under voltage lockout is internally set at 2.6v, but can be increased by programming the threshold with a resistor network on the enable pin. the output voltage startup ramp is controlled by the soft - start pin. an open drain power good signal indicates the outpu t is within 93% to 107% of its nominal voltage. the AP3440 is available in u - qfn 3030 - 16 packag e. applications ? low - voltage, high - density power systems ? point of load regulation for high performance dsps, fpgas, asics and microprocessors ? broadband, networking and optical communications infrastructure pin assignments ( top view) u - qfn 3030 - 1 6 features ? input voltage range: 2.95v to 5.5v ? 0.8v reference voltage with 3% precision ? two 30 m ? ? ( t ypical) mosfets for high efficiency at 4 a load ? high efficiency: u p to 94% ? output current: 4 a ? programmable frequency: 2 00khz to 2mhz ? current mode control ? synchronizes to external clock ? adjustable soft - start ? soft start - up into pre - biased output ? uv and ov power good output ? built - in over current protection ? built - in thermal shutdown function ? programmable uvlo function ? built - in over voltage protection ? thermally enhanced 3mm3mm 16 - pin u - qfn3030 - 16 ? totally lead - free & fully rohs compliant ( note1 & 2) ? halogen and antimony free. green device (note 3) note s: 1 . no purposely added lead. fully eu directive 2002/95/ec (rohs) & 2011/65/eu (rohs 2) compliant. 2. see http://www.diodes.com/quality/lead_free.html for more information about diodes incorporateds definitions of hal ogen - and antimony - free, "green" and lead - f ree . 3. halogen - and antimony - free "green products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total br + cl) and <1000ppm antimony compounds. v i n v i n g n d g n d a g n d f b c o m p r t / c l k s s s w s w s w b o o t p g d e n v i n e p 5 6 7 8 1 2 3 4 9 12 pin 1 mark 11 10 13 14 15 16
AP3440 document number: ds 36691 rev. 2 - 2 2 of 15 www.diodes.com march 2014 ? diodes incorporated AP3440 a product line of diodes incorporated new product typical applications circuit pin description pin number pin name function 1,2,16 vin supply input pin. a capacitor should be connected between the vin and gnd pin to keep the dc input voltage constant 3,4 gnd power ground. this pin should be electrically connected to the power pad under the ic 5 agnd analog ground. this pin should be electrically connected to gnd close to the device 6 fb feedback pin. inverting node of the transconductance error amplifier 7 comp compensation pin. this pin is the output of the transconductance error amplifier and the input to the current comparator. connect external compensation elements to this pin to sta bilize the control loop 8 rt/clk resistor timing or external clock input pin 9 ss soft - start pin. an external capacitor connected to this pin sets the output voltage rise time. this pin can also be used for tracking 10,11,12 sw internal power switch output pin. this pin is connected to the inductor and bootstrap capacitor 13 boot bootstrap pin. a bootstrap capacitor is connected between the boot pin and sw pin. the voltage across the bootstrap capacitor drives the internal high - side power mosfet 14 pgd power good indicator output. asserts low if output voltage is low due to thermal shutdown, over - current, over/under - voltage or en shut down 15 en enable pin, internal pull - up current source. pull below 1.2v to disable. float to enable. can be used to set the on/off threshold (adjust uvlo) with two additional resistors ep exposed thermal pad exposed pad can be connected to gnd, for best thermal performance thermal vias are recommended under the package v i n v i n v i n p g d e n c o m p s s r t / c l k s w s w s w b o o t f b g n d g n d a g n d l 1 1 . 5 m h v o u t = 1 . 8 v r 6 1 2 . 5 k r 7 1 0 k v i n = 5 v r 4 1 0 0 k 1 6 1 2 1 4 1 5 7 8 9 1 0 1 1 1 2 1 3 6 4 5 3 c 5 o p t i o n a l c 2 c 7 0 . 0 1 m f c 4 2 . 7 n f r 3 7 . 5 k r 5 1 8 0 k r 1 r 2 a p 3 4 4 0 c 3 c 9 2 2 m f c 1 1 0 m f 0 . 1 m f c 8 2 2 m f u 1 c 6 0 . 1 m f r 8 2 . 2 ( o p t i o n a l ) c 1 0 2 . 2 n f ( o p t i o n a l )
AP3440 document number: ds 36691 rev. 2 - 2 3 of 15 www.diodes.com march 2014 ? diodes incorporated AP3440 a product line of diodes incorporated new product functional block diagram
AP3440 document number: ds 36691 rev. 2 - 2 4 of 15 www.diodes.com march 2014 ? diodes incorporated AP3440 a product line of diodes incorporated new product absolute maximum ratings (note 4 ) symbol parameter rating unit v in vin pin voltage - 0.3 to 6.5 v v en en pin voltage - 0.3 to 6.5 v v sw sw pin voltage - 0.3 to v in +0.3 v v fb fb pin voltage - 0.3 to 6.5 v v comp comp pin voltage - 0.3 to 6.5 v v pgd pgd pin voltage - 0.3 to 6.5 v v rt/clk rt/clk pin voltage - 0.3 to 6.5 v v ss ss pin voltage - 0.3 to 6.5 v ? ja thermal resistance 70 oc/w t j operating junction temperature - 40 to + 125 oc t stg storage temperature - 65 to + 150 oc t lead lead temperature (soldering, 10sec) + 260 oc esd(machine model) 200 v esd(human body model) 2000 v note 4 : stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. these are stres s ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended o perating conditions is not implied. exposure to absolute maximum ratings for extended periods may affect device reliability. recommended operating conditions symbol parameter min max unit v in input voltage 2.95 5.5 v i out(max) maximum output current 4 a t a operating ambient temperature - 40 + 85 oc electrical characteristics (@ v in =2.95 to 5.5 v, t a = + 25oc , unless otherwise specified . specifications with boldface type apply over full operating temperature range from - 40 to + 85 oc . ) symbol parameters conditions min typ max unit supply voltage (vin pin) v in input voltage 2.95 5.5 v i q quiescent current v fb =0.9v, v in =5v, t a = + 25 oc , r t =400k ? 360 575 a i shdn shutdown supply current v en =0v, t a = + 25 ? c , 2.95vv in 5.5v 2 5 a enable and uvlo (en pin) v en_h enable threshold rising 1.16 1.25 1.37 v v en_l falling 1.18 v v uvlo internal under voltage lockout threshold 2.6 2.8 v v hys internal under voltage hysteresis 150 mv
AP3440 document number: ds 36691 rev. 2 - 2 5 of 15 www.diodes.com march 2014 ? diodes incorporated AP3440 a product line of diodes incorporated new product electrical characteristics (cont.) (@v in =2.95 to 5.5 v, t a = + 25oc , unless otherwise specified . specifications with boldface type apply over full operating temperature range from - 40 to + 85 oc . ) symbol parameters conditions min typ max unit voltage reference (fb pin) v ref voltage reference 2.95vv in 5.5v 0.779 0.803 0.827 v mosfet r on_h high side switch on - resistance v boot - sw =5v 30 60 m ? v boot - sw =2.95v 44 70 m ? r on_l low side switch on - resistance v in =5v 30 60 m ? v in =2.95v 44 70 m current limit i limit current limit threshold 4.2 7.0 a thermal shutdown t tsd thermal shutdown 140 ? c hysteresis 20 ? c timing resistor and external clock (rt/clk pin) switching frequency range (rt mode) 2 00 2000 khz switching frequency range (clk mode) 3 00 2000 khz f s switching frequency r t =400k ? 400 500 600 khz minimum clk pulse width 75 ns rt/clk voltage r t =400k ? 0.5 v rt/clk high threshold 1.6 2.2 v rt/clk low threshold 0.4 0.6 v boot (boot pin) r boot boot charge resistor v in =5v 16 ? ? boot - sw uvlo v in =2.95v 2.2 v soft start (ss pin) i ss charge current v ss =0.4v 2 m a v ss ss to reference crossover 98% nominal 1.1 v power good (pgd pin) v fb_th feedback threshold v fb falling (fault) 91 %v ref v fb rising (good) 93 v fb rising (fault) 107 v fb falling (good) 105
AP3440 document number: ds 36691 rev. 2 - 2 6 of 15 www.diodes.com march 2014 ? diodes incorporated AP3440 a product line of diodes incorporated new product performance characteristics supply current vs. input voltage supply current vs. temperature uvlo threshold vs. temperature en threshold vs. temperature efficiency v s. output current switching frequency v s. temperature 2.4 2.7 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 5.7 360 365 370 375 380 385 390 395 400 405 410 415 420 425 430 435 supply current ( m a) input voltage (v) -50 -25 0 25 50 75 100 125 150 920 930 940 950 960 970 980 990 1000 1010 1020 r t =180k switching frequency (khz) temperature ( o c) -50 -25 0 25 50 75 100 125 150 2.10 2.15 2.20 2.25 2.30 2.35 2.40 2.45 2.50 2.55 2.60 uvlo threshold (v) temperature ( o c) start switching stop switching 0 300 600 900 1200 1500 1800 2100 2400 2700 3000 3300 3600 3900 4200 30 35 40 45 50 55 60 65 70 75 80 85 90 95 100 efficiency (%) output current (ma) v out =1.8v v in =3.3v v in =5v -50 -25 0 25 50 75 100 125 150 1.14 1.15 1.16 1.17 1.18 1.19 1.20 1.21 1.22 1.23 1.24 1.25 1.26 1.27 1.28 en threshold (v) temperature ( o c) v in =5v rising falling -50 -25 0 25 50 75 100 125 150 390 395 400 405 410 415 420 425 430 435 440 445 450 455 460 supply current ( m a) temperature ( o c)
AP3440 document number: ds 36691 rev. 2 - 2 7 of 15 www.diodes.com march 2014 ? diodes incorporated AP3440 a product line of diodes incorporated new product performance characteristics (cont.) start u p from v in (v in =5v, v out =1.8v, i out =4a) disable ic (v in =5v, v out =1.8v, i out =4a) time 4ms/div time 20 m s/div load transient response ( v in =5v, v out =1.8v, i out =0 to 4a ) synchronizing to external clock (f clock =2mhz) time 200 m s/div time 400ns/div s hort circuit protection (v in =5v, v out =1.8v, i out =4a) s hort circuit recovery (v in =5v, v out =1.8v, i out =4a) time 4ms /div time 4ms/div v out 1v/div v in 2v/div i l 2a/div v ss 2v/div v en 2v/div v out 1v/div v ss 2v/div i l 2a/div v out(ac) 200mv/div i out 2a/div v clock 2v/div v sw 2v/div v out 1v/div v ss 2v/div v comp 0.5v/div i l 2a/div v out 1v/div v ss 2v/div v comp 0.5v/div i l 2a/div
AP3440 document number: ds 36691 rev. 2 - 2 8 of 15 www.diodes.com march 2014 ? diodes incorporated AP3440 a product line of diodes incorporated new product application note theory of operation the AP3440 consists of a reference voltage module, slope compensation circuit, error amplifier, pwm comparator, current limit circuit, two n - channel mosfets etc. (refer to the functional block diagram o n page 3 for detailed information) soft - start the ap 3440 integrates an internal soft start circuit to minimize inrush currents or provide power supply sequencing during power up . a capacitor connected between ss pin and ground implements the soft - start time. the AP3440 has an internal pull - up current source of 2 a, which charges the external slow start capacitor. equation 1 calculates the required slow start capacitor, i ss is the internal slow start charging current of 2 a, and v ref is the internal voltage reference of 0.803v. .(1) during normal operation, if the v in goes below the uvlo, or the en pin is pulled below 1.2v, or a thermal shutdown occurs, the AP3440 will stop switching and the ss pin will be discharged to 40mv before reinitiating a powering up sequence. enable and adjusting uvlo the AP3440 are disabled when the v in falls below 2.6v. if an application requires a higher under - voltage lockout (uvlo), use the en pin as shown in figure 1 to adjust the input voltage uvlo by using two external resistors. the en pin has an internal pull - up current source that provides the default condition of the AP3440 operating when the en pin floats. once the en pin voltage exceeds 1.25v, an additional 2.55 a of hysteresis is added. when the en pin is pulled below 1.18 v, the 2. 55 a hysteresis is removed. this additional current facilitates input voltage hysteresis. for AP3440, the divider resistor r1 and r2 on the en pin can be calculated according to equation 2 and 3. ...(2) (3) figure 1 . adjustable under voltage lock out adjusting output voltage the output voltage is set with a resistor divider from the fb pin. it is recommended to use divider resistors with 1% toleran ce or better. start with a 10k r2 r esistor and use the equation 4 to calculate r1. to improve efficiency at very light loads consi der using larger value resistors. if the values are too high, the regulator is more susceptible to noise and voltage errors from the fb input current are noticeable. 6 10 2 . 3 1 18 . 1 1 18 . 1 2 ? ? ? ? ? ? ? r v r r stop 6 10 59 . 2 944 . 0 1 ? ? ? ? ? stop start v v r a p 3 4 4 0 r 1 r 2 v i n e n 2 . 5 5 a 0 . 6 a ) ( ) ( ) ( ) ( v v a i ms t nf c ref ss ss ss m ? ?
AP3440 document number: ds 36691 rev. 2 - 2 9 of 15 www.diodes.com march 2014 ? diodes incorporated AP3440 a product line of diodes incorporated new product application note (cont.) resistor r1 can be calculated according to equation 4. .. (4) figure 2 . voltage divider circuit synchronize using the rt/clk pin the rt/clk pin of AP3440 is used to synchronize the converter with an external system clock referring to figure 3 . to implement the synchronization feature in a system, connect a square wave to the rt/clk pin with an on - time of at least 75ns. when the cloc k is detected on the rt/clk pin, a mode change occurs and the pin becomes a synchronization input. the internal amplifier is disabled. if clocking edges stop, the internal amplifier is re - enabled and the mode returns to the frequency set by the resistor. t he low level of the square wave must be lower than 0.6v and the high level higher than 1.6v typically. the synchronization frequency range is from 300khz to 2000khz. the rising edge of the sw is synchronized to the falling edge of rt/clk pin. figure 4 show s a typical synchronizing waveform, the clock frequency is 2mhz. figure 3 . synchronizing to a system clock figure 4 . synchronizing waveform constant switching frequency and timing resistor the switching frequency of the AP3440 is adjustable over a wide range from 200khz to 2000khz by placing a resistor with maximum value of 1000k and minimum of 85k? , respectively, on the rt/clk pin . an internal amplifier holds this pin at a fixed voltage when connecting an external resistor to ground to set the switching frequency. th e v rt/clk is typically 0.5v. to determine the timing resistance for a given switching frequency, use the equation 5. .(5) ..(6) to reduce the solution size one should typically set the switching frequency as high as possible, but tradeoffs of the effici ency, maximum input voltage and minimum controllable on time should be considered. ? ? ? ? ? ? ? ? ? 1 803 . 0 2 1 out v r r a p 3 4 4 0 r t r t / c l k c l o c k s o u r c e 0793 . 1 ) ( 311890 ) ( khz f k r sw t ? ? a p 3 4 4 0 r 1 r 2 v o u t f b 0 . 8 0 3 v s s 9393 . 0 ) ( 133870 ) ( ? ? k r khz f t sw
AP3440 document number: ds 36691 rev. 2 - 2 10 of 15 www.diodes.com march 2014 ? diodes incorporated AP3440 a product line of diodes incorporated new product application note (cont.) over current protection the AP3440 implements a cycle - by - cycle current limit. the high side switch current is detected during each cycle. during scp conditions, v out is pulled down and v comp is drived to high, increasing the switch current. when the increased high side switch current is continuously detected to trigger the current limit of high side switch 6 times, the high side and low side switches are turned off for about 2.5ms. th en both switches s tart switching and they will not be turned off until the next 6 ocps are triggered. the ic works with a hiccup mode during scp con ditions. power good the pgd pin output is an open drain mosfet. the output is pulled low when the fb voltage enters the fault condition by falling below 91% or rising above 107% of the nominal internal reference voltage. there is a 2% hysteresis on the threshold voltage, so when the f b voltage rises to the good condition above 93% or falls below 105% of the internal voltage refe rence the pgd output mosfet is turned off. it is recommended to use a pull - up resistor between the values of 1k to a voltage source that is 5v or less. the pgd is in a valid state once the vin input voltage is greater than 1.2v. thermal shutdown the AP3440 implement an internal thermal shutdown to protect itself if the junction temperature exceeds + 140c. switching is stopped when the junction temperature exceeds the thermal trip threshold. once the die temperature decreases below + 120c , the device reinitiates the soft start operation. the thermal shutdown hysteresis is + 20c. component selection typical application circuit of AP3440 is shown in figure 5 . for the major component selection please refer to the following section . figure 5 . typical application of AP3440 input capacitor the AP3440 requires a high quality ceramic, type x5r or x7r, input decoupling capacitor of at leas t 4.7 f effective capacitance and in some applications a bulk capacitor. the effective capacitance includes any dc bias effects. to ensure a stable operation, the inpu t capacitor should be placed as close to the vin pin as possible, and its value varies according to different load and different characteristic of input impedance. there are two important parameters of the input capacitor: the voltage rating and rms current rating. the voltage rating of t he input capacitor should be at least 1.25 times larger than the maximum input voltage. the capacitor must also have a rms current rating greater than the maximum input current ripple of the AP3440. the rms current of input capacitor can be expressed as: ..(7) ? ? ? ? ? ? ? ? ? ? ? ? in out in out out(max) cin_rms v v 1 v v i i v i n v i n v i n p g d e n c o m p s s r t / c l k s w s w s w b o o t f b g n d g n d a g n d l 1 1 . 5 m h v o u t = 1 . 8 v r 6 1 2 . 5 k r 7 1 0 k v i n = 5 v r 4 1 0 0 k 1 6 1 2 1 4 1 5 7 8 9 1 0 1 1 1 2 1 3 6 4 5 3 c 5 o p t i o n a l c 2 c 7 0 . 0 1 m f c 4 2 . 7 n f r 3 7 . 5 k r 5 1 8 0 k r 1 r 2 a p 3 4 4 0 c 3 c 9 2 2 m f c 1 o p t i o n a l 1 0 m f 0 . 1 m f c 8 2 2 m f u 1 c 6 0 . 1 m f r 8 2 . 2 ( o p t i o n a l ) c 1 0 2 . 2 n f ( o p t i o n a l )
AP3440 document number: ds 36691 rev. 2 - 2 11 of 15 www.diodes.com march 2014 ? diodes incorporated AP3440 a product line of diodes incorporated new product application note (cont.) output capacitor the output capacitor is the most critical component of a switching regulator. it is used for filtering output and keeping the loop stable. the typical value is 44 f. the primary parameters for output capacitor are the voltage rating and t he equivalent series resistance (esr). a low esr capacitor is preferred to keep the output voltage ripple low. the output ripple is calculated as the following: ..(8) where f is the switching frequency, c out is the output capacitance and i l is the ripple current in the inductor. inductor the inductor is used to supply smooth current to output when it is driven by a switching voltage. the higher the inductance, the lower the peak - to - peak ripple current, as the higher inductance usually means the larger inductor size, so some trade - offs should be made when select an inductor. the AP3440 is a synchronous buck converter. it always works on continuous current mode (ccm), and the inductor value can be s elected as the following: . .(9) where v out is the output voltage, v in is the input voltage, i out is the output current, k is the coefficient of ripple current, and its typical value is 20% to 40%. another important parameter for the inductor is the current rating. exceeding an inductor's maximum current rating ma y cause the inductor to saturate and o verheat. if inductor value has been selected, the peak inductor current can be calculated as the following: ..(10) it should be ensured that the current rating of the selected inductor is 1.5 times of the i peak . slow start capacitor the slow start capacitor determines the output voltage soft start time during power up. the slow start capacitor value can be calculated using equation 11. (11) in AP3440, i ss is 2 a and v ref is 0.803v. bootstrap capacitor a 0.1 f ceramic capacitor must be connected between the boot pin and the sw pin for normal operation. it is recommended to use a ce ramic capacitor with x5r or better grade dielectric. feedback resistors it is recommended to use divider resistors with 1% tolerance or better. start with a 10k for t he r7 resistor and use the equation 12 to calculate r6. (12) ) ( k i v f v v v l out in out in out ? ? ? ? ? ? ) 8 1 ( out esr l out c f r i v ? ? ? ? ? ? ? ) ( ) ( ) ( ) ( v v a i ms t nf c ref ss ss ss m ? ? ) 2 ( l v f v v v i i in out in out out peak ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? 1 803 . 0 7 6 out v r r
AP3440 document number: ds 36691 rev. 2 - 2 12 of 15 www.diodes.com march 2014 ? diodes incorporated AP3440 a product line of diodes incorporated new product application note (cont.) compensation the output capacitor and the load resistance largely determine where the error amplifier poles and zeros need to be placed for optimum transient response and loop stability. the corner frequency of the pole and zero generated by output capacitor are: ..(13) . .. (14) where r load is the load resistance, c out is the output capacitance and r esr is the capacitor esr. the error amplifier provides most of the loop gain. after selecting the output capacitor, the control loop is compensated by tailoring the frequency response of the error amplifier. the low frequency pole of the error amplifier is the dominant pole and is determined primari ly by c comp and the output resistance of the error amplifier as shown by: ..( 15) resistor r comp adds a zero to the frequency response to control gain in the mid frequency range. this zero frequency is: ..(16) where r comp and c comp are compensation resistor and capacitor connected to comp pin, r out _ ea is the output impedance of the error amplifier. a 7 .5k re sistor and 2.7nf capacitor are used in typical application. layout consideration pcb layout is very important to the performance of AP3440. the loop which switching current flows through should be kept as short as possible. the external components (especially c in ) should be placed as close to the ic as possible. the feedback trace should be routed far away from the inductor and noisy power traces, and it needs to be routed as direct as possible. locate the feedback divider resistor network near the feedback pin with short leads. since the sw connection is the switching node, the output inductor should be located very close to the sw pins, and the area of the pcb conductor is minimized t o prevent excessive capacitive coupling. the boot capacitor must also be located close to the device. the sensitive analog ground connections for the feedback voltage divider, compensation components, slow start capacitor and frequency set resistor should be connected to a separate analog ground trace. the rt/clk pin is sensitive to noise so the r t resistor should be located as close as possible to the ic and routed with minimal lengths of trace. figure 6 . top view of pcb layout figure 7 . bottom view of pcb layout out load p c r f ? ? ? ? 2 1 1 comp ea out p c r f ? ? ? _ 2 2 1 ? comp comp z c r f ? ? ? ? 2 1 2 out esr z c r f ? ? ? ? 2 1 1
AP3440 document number: ds 36691 rev. 2 - 2 13 of 15 www.diodes.com march 2014 ? diodes incorporated AP3440 a product line of diodes incorporated new product ordering information diodes ics pb - free products with "g1" suffix in the part number, are rohs compliant and green. package temperature range part number marking id packing u - qfn 3030 - 16 - 40 to + 85 oc AP3440fntr - g1 b2d 5000/ tape & reel marking information : aac logo b2d: marking id (per datasheet) yww: year and work week of mold operation m: assembly site code xx: the 7 th & 8 th digits of batch no. pin 1 mark a p 3 4 4 0 x x x x - x x p a c k i n g p a c k a g e t r : t a p e & r e e l f n : u - q f n 3 0 3 0 - 1 6 g 1 : g r e e n p r o d u c t n a m e r o h s / g r e e n b 2 d y w w m x x
AP3440 document number: ds 36691 rev. 2 - 2 14 of 15 www.diodes.com march 2014 ? diodes incorporated AP3440 a product line of diodes incorporated new product package outline dimensions (1) package t ype: u - qfn 3 0 3 0 - 1 6 suggested pad layout (1) package t ype: u - qfn 3 0 3 0 - 1 6 u - qfn3030 - 16 type b dim min max typ a 0 .55 0. 6 5 0. 60 a1 0 0. 0 5 0. 02 a 3 ? ? 0. 15 b 0. 18 0. 28 0. 23 d 2.95 3.05 3.00 d 2 1.40 1.60 1.50 e 2.95 3.05 3.00 e 2 1.40 1.60 1.50 e ? ? ? ? 0.50 l 0.35 0.45 0. 40 z ? ? ? ? 0.625 all dimensions in mm dimensions value (in mm) c 0.500 g 0.150 g1 0.150 x 0.350 x1 1.800 y 0.600 y1 1.800 x (16x) y (16x) c y1 x1 g1 g side view a a3 a1 bottom view d d2 e e b (16x) l (16x) e2 (pin #1 id) z (8x) 0.450 r0.200
AP3440 document number: ds 36691 rev. 2 - 2 15 of 15 www.diodes.com march 2014 ? diodes incorporated AP3440 a product line of diodes incorporated new product important notice diodes incorporated makes no warranty of any kind, express or implied, with regards to this document, including, but not limited to, the implied warranties of merchantability and fitness for a particular purpose (and their equivalents under the laws of any jurisdiction). diodes incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes without further notice to this document and any product described herein. diodes incorporated does not assume any lia bility arising out of the application or use of this document or any product described herein; neither does diodes incorporated convey any license unde r its patent or trademark rights, nor the rights of others. any customer or user of this document or pro ducts described herein in such applications shall assume all risks of such use and will agree to hold diodes incorporated and all the companies whose products are represented on diod es incorporated website, harmless against all damages. diodes incorpora ted does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized sales chann el. should customers purchase or use diodes incorporated products for any unintended or unauthorized application, customers shall i ndemnify and hold diodes incorporated and its representatives harmless against all claims, damages, expenses, and attorney fees arising ou t of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized ap plication. products described herein may be covered by one or more united states, international or foreign patents pending. product nam es and markings noted herein may also be covered by one or more united states, international or foreign trademarks. th is document is written in english but may be translated into multiple languages for reference. only the english version of t his document is the final and determinative format released by diodes incorporated. life support diodes incorporated products are specifically not authorized for use as critical components in life support devices or systems without the express written approval of the chief executive officer of diodes incorporated. as used herein: a. life support devices or systems are devices or systems which: 1. are intended to implant into the body, or 2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided i n the labeling can be reasonably expected to result in significant injury to the user. b. a critical component is any component in a life support device or system whose failure to perform can be reasonably expe cted to cause the failure of the life support device or to affect its safety or effectiven ess. customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support d evices or systems, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety - related re quirements concerning their products and any use of diodes incorporated products in such safety - critical, life support devices or systems, notwithstanding any devices - or systems - related information or support that may be provided by diodes incorporated. further, customers must fully indemnify diodes incorporated and its representatives against any damages arising out of the use of diodes incorporated products in such safety - critical, life support devices or systems. copyright ? 201 4 , diodes incorporated www.diodes.com


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